EMMC Lifetime (AN50)
| Affected Products | All congatec products with eMMC |
Preface
This application note explains how to estimate, increase, and monitor eMMC lifetime.
Terminology
| Term | Description |
|---|---|
| eMMC | Embedded Multi-Media Card |
| OTP | One Time Programmable |
| ECC | Error Correction Code |
| P/E | Program-Erase |
| SLC | Single Level Cell |
| MLC | Multi Level Cell |
| TLC | Triple Level Cell |
| QLC | Quadruple Level Cell |
| pSLC | Pseudo Single Level Cell |
Introduction to eMMC Lifetime
Embedded Multi-Media Cards (eMMCs) are based on NAND flash. All NAND flash-based storage devices have a limited lifetime.
In simple terms, programming and erasing data gradually weakens a NAND flash cell until it can no longer properly hold a charge or differentiate between the voltage levels. This phenomenon limits the lifetime of an eMMC. A detailed explanation of this phenomenon is outside the scope of this application note.
Flash Controller
The flash controller is part of an eMMC. It improves the lifetime of the NAND flash via various features, such as:
- Wear Leveling Repeated writes to the same memory cell eventually lead to the cell no longer being able to retain data. The wear leveling feature ensures that the data is distributed evenly.
- Bad Block Management A bad block is a flash block that cannot be successfully written or erased without bit-errors. Information about existing bad blocks is stored on the device by the manufacturer. Additional bad blocks can develop over time. The flash controller recognizes them and adds them to the list of bad blocks. Future write/erase procedures can work around these bad blocks.
- ECC Error correction code is used to identify and correct errors. This is typically achieved by adding a number of redundant bits to a data string. The encoded message can then be decoded by the controller to check for and correct bit errors in the message.
- Garbage Collection If data within certain pages of a block is no longer needed, the controller can just read back and rewrite the necessary data to a previously erased empty block. The leftover pages can then be used for new data.
Flash Cell Types
eMMCs implement one main flash cell type. The different types can store different numbers of bits per cell. Flash cell types with a lower number of bits per cell can typically endure a significantly higher number of Program-Erase (P/E) cycles.
The table below compares the different flash cell types. Use the stated P/E cycles as a guideline only and request them from your FAE for a particular congatec product.
| SLC
Single Level Cell |
3D-MLC
Multi Level Cell |
3D-TLC
Triple Level Cell |
3D-QLC
Quadrupel Level Cell | |
|---|---|---|---|---|
| Bits/Cell | 1 | 2 | 3 | 4 |
| Density | Low | Mid | High | Highest |
| P/E Cycles | ~100,000 | ~5,000 | ~3,000 | ~1,000 |
Note:
The flash cell types with planar (2D) or 3D NAND technology feature different P/E cycle values. 3D NAND flash increases capacity and reliability of an eMMC.
Enhanced User Area and pSLC Mode
The JEDEC JESD84-B51 standard describes a storage mode, whereas all or parts of the eMMCs memory can be reconfigured to a more robust and reliable mode.
How the enhanced user area is implemented is up to the eMMC manufacturer.
For eMMCs that are used on congatec products, the enhanced user area is pseudo-SLC mode.
This mode greatly increases the maximum number of P/E cycles by reducing the bits per cell to one, same as SLC. That’s why this mode is called pseudo-SLC.
The trade-off is a greatly reduced storage capacity – it is divided by the bits per cell of the flash cell type (e.g., leaves 1/3 of the original storage capacity of an eMMC with TLC flash cell type).
To enable this mode, refer to section 3.2.
Note:
The enhanced user area mode for eMMCs on congatec products is pSLC.
Estimating the eMMC Lifetime
The amount of logic data that can be written to the eMMC until the end of its lifetime can be estimated with this formula:
- TBW = DC * EF / WAF
TBW
- Total Bytes Written throughout the lifetime of the eMMC.