Real-Time Applications: BIOS Setup Settings and Advice (AN40)
| Affected Products | All Intel x86 products |
|---|
Preface
This application note provides a list of recommended BIOS setup settings for real-time applications, describes each setting and informs about some additional topics related to real-time operating systems (RTOS).
Terminology
| Term | Description |
|---|---|
| CPU | Central Processing Unit |
| GPU | Graphics Processing Unit |
| IMC | Integrated Memory Controller |
| IGD | Integrated Graphics Device |
| PCH | Platform Controller Hub |
| SKU | Stock Keeping Unit |
| DMI | Direct Media Interface |
| ASPM | Active State Power Management |
| cTDP | Configurable Thermal Design Power |
| TCC | Thermal Control Circuit or Time Coordinated Computing |
| CAT | Cache Allocation Technology |
| TSN | Time Sensitve Networking |
| QoS | Quality of Service |
| RTOS | Real-time Operating System |
| OS | Operating System |
Introduction
The purpose of Real-Time Operating Systems (RTOS) is to service interrupts from time critical peripheral devices (typically a field bus device) within the required time limit. The specific time limit may vary depending on the system requirements (hard versus soft real-time) but may not be exceeded at any time during operation.
In contrast to RTOS, generic Operating Systems (OS) like Windows do not have such a strict time limit for servicing interrupts. Power management and optimized performance are typically prioritized. But any feature that saves power or increases short-term performance can increase latency and therefore the limit for servicing interrupts may be exceeded. This is unacceptable for real-time applications because they require predictable and constant performance.
Section Recommended BIOS Setup Settings of this application note describes the most critical BIOS setup settings for RTOS. To optimize the RTOS for a specific real-time application, it is important to understand the impact of each setting.
Section Additional Advice of this application note gives additional advice on how to optimize RTOS performance.
Recommended BIOS Setup Settings
Many BIOS features have a significant impact on the interrupt latency and jitter. Even a single incorrect setting could lead to total system failure.
Note:
The available features depend on the specific BIOS. A BIOS may provide relevant features not covered in this application note or not provide features covered in this application note. In general, it is recommended to disable all power-saving and short- term performance enhancing features because the transition between power states introduces latency.
Overview
The table below lists the recommended BIOS setup settingss for real-time applications and the default congatec BIOS setup setting:
| BIOS Setup Setting | Recommended | Default | |
|---|---|---|---|
| CPU | Enhanced Intel Speed Step Technology (EIST) | Disabled | Enabled |
| Intel Speed Shift Technology (SST) | Disabled | Enabled | |
| Intel Turbo Boost Technology | Disabled | Enabled | |
| C-States | Disabled | Disabled | |
| Thermal Control Circuit (TCC) Activation Offset | 0 | 0 | |
| Intel Hyper-Threading Technology (HTT) | Disabled | Enabled | |
| RAM | System Agent Enhanced Intel SpeedStep (SA GV) | Fixed High | Fixed High |
| IGD | GT PM Support | Disabled | Disabled |
| Render Standby (RC6) | Disabled | Enabled | |
| LPM | DMI Link ASPM Control | Disabled | Disabled |
| PCI Express Link ASPM Control | Disabled | Disabled | |
| Aggressive LPM Support | Disabled | Disabled | |
| Legacy IO Low Latency | Enabled | Disabled |
Note:
The BIOS setup settings listed above are only recommendations and may not be ideal for your real-time application. Read the sub-sections below for a description of each setting and additional notes.
CPU
The CPU performance can be influenced by various power-saving and short-term performance-enhancing features. Such features should be disabled because they introduce latency (e.g. increase response time to a field bus device interrupt).
The following settings can usually be found in the BIOS setup program under submenu “CPU Configuration”, “CPU Thermals and Performance”, or similar.
Enhanced Intel Speed Step Technology (EIST)
If enabled, the OS can change the CPU core frequency and voltage depending on the workload. The CPU cores are not executing instructions during the frequency switching. This feature introduces latency.
Intel Speed Shift Technology (SST)
If enabled, the CPU can change its core frequency and voltage depending on the workload. The CPU cores are not executing instructions during the frequency switching. This feature introduces latency.
Intel Turbo Boost Technology
If enabled, the CPU can dynamically increase its frequency above the rated operating frequency. The CPU cores are not executing instructions during the frequency switching. This feature introduces latency.
Note:
The Intel Turbo Boost Technology can also challenge the thermal design, possibly triggering the Thermal Control Circuit (TCC) to throttle the CPU which results in alternating CPU performance.
C-States
Idle States (C-states) are used to save power when the CPU is idle. C0 is the operational state, meaning that the CPU is doing useful work. C1 is the first idle state, C2 the second, and so on, where more power saving actions are taken for numerically higher C-states. These idle states dramatically increase the CPU response time because it takes a long time to resume the CPU from these low power states.
Thermal Control Circuit (TCC) Activation Offset
The TTC Activation Offset defines the CPU die temperature at which the CPU throttling mechanism is started. For optimized real-time behavior, CPU throttling should not be started at temperatures lower than the maximum specified die temperature.
The set value is subtracted from the max. specified die temperature (100°C). In order to prevent CPU throttling below 100°C, the default value of 0 should not be changed. Proper CPU and system cooling is also beneficial for good real-time behavior because overheating always results in some sort of performance reduction.
Note:
It is not possible to disable CPU thermal throttling. It is only possible to prevent it via proper thermal design. For more information, refer to section Thermal Design.
Intel Hyper-Threading Technology (HTT)
Delivers two processing threads per physical core. Highly threaded applications can get more work done in parallel, completing tasks sooner. But executing real-time tasks on logical CPU cores might have negative impacts on the real-time performance of the system.
RAM
A constant high memory bandwidth is also beneficial for an RTOS. Power management features can negatively impact the memory performance.
The following setting can usually be found in the BIOS setup program under submenu Chipset / Processor (Integrated components) / Memory Configuration.
System Agent Geyserville (SA GV)
If enabled, the Intel Memory Controller (IMC) of Intel Core U processors changes the memory clock speed between two operating points depending on memory utilization.
Note:
Dual-channel (interleaved) mode improves real-time behaviour. Therefore, congatec highly recommends a dual-channel configuration with two identical DRAM modules.
Integrated Graphics Device (IGD)
In case the real-time OS uses the integrated GPU for video output it is also important to disable certain power management functions for the graphics.
The following settings can usually be found in the BIOS setup program under submenu Chipset / Processor (Integrated components) /Graphics Configuration and/or Advanced / Power&Performance / GT Power Management Control.
GT PM Support
If disabled, power saving features of the IGD are disabled resulting in best response time.
Render Standby (RC6)
If enabled, the IGD core voltage is significantly lowered to reduce power consumption. If GT PM Support is disabled, this feature is automatically disabled.
Maximum GT Frequency
If enabled, the IGD frequency is limited. Since the Thermal Design Power (TDP) budget is shared with the x86 cores, enabling this feature can improve the performance stability of the x86 cores at the cost of IGD performance. Whether this trade-off is acceptable or not, depends on the real-time application. For more information, see section Thermal Design Power (TDP) Constraints
LPM
Link Power Management (LPM) provides power saving features for PCI Express (PCIe), SATA, and the Direct Media Interface (DMI) links. Such features should be disabled because they will introduce latency.
Note:
The BIOS setup program might provide power-saving features that are not described in the sub-sections below but should also be disabled. For example, clock gating (e.g. for PCIe) and throttling (e.g. PCH Throttling, Thermal Throttling) should be disabled.
DMI Link ASPM Control
If enabled, the Direct Media Interface (DMI) link between the CPU and the PCH can go into low power states. The transition between power states increases latency.
PCI Express Link ASPM Control
If enabled, the PCI Express link can go into active low power states. The transition between these power states increases latency. Each PCIe port (including PEG) has a dedicated BIOS setup option to enable ASPM.
Aggressive LPM Support
If enabled, the SATA controller can go into low power states. The transition between power states can result in delays when reading from or writing to the SATA device.
Legacy IO Low Latency
This setup option disables additional clock gating and power management functions and should always be Enabled if it is available in the BIOS setup.
Additional Advice
In addition to the BIOS setup settings described in the previous section, other (not BIOS related) optimizations may be required to further improve the performance of an RTOS.
Note:
It is outside the scope of this Application Note to cover all the topics that might be relevant for an RTOS. Contact your RTOS or Hypervisor vendor for further support.
Thermal Design
CPU thermal throttling results in unstable CPU performance and can lead to total system failure. The thermal design must ensure adequate cooling of the CPU at all times to prevent the Thermal Control Circuit (TCC) in the CPU from triggering thermal throttling. Furthermore, the thermal design must also ensure adequate cooling of other components (e.g. memory) at all times to prevent unstable performance.
Most Intel CPUs are rated for a maximum die temperature of 100°C. The TCC triggers CPU thermal throttling at this temperature. This temperature can be lowered (but not raised) via a BIOS setup setting. For more information, refer to section Thermal Control Circuit (TCC) Activation Offset
Thermal Design Power (TDP) Constraints
All circuits integrated in the processor package share the TDP budget with the x86 CPU cores. For example, most recent mobile processors made by Intel have an Integrated Graphics Device (IGD) and Integrated Memory Controller (IMC). The TDP is usually also the power limit of all the integrated circuits in the processor package.
Especially the IGD can draw a lot of power under load. If the TDP budget is reached, the CPU performance becomes unstable. Most importantly, the x86 cores may run at a much lower clock speed.
There are several ways to prevent such unstable CPU performance:
- Reduce the IGD power consumption (see section Maximum GT Frequency)
- Increase the power limit (cTDP - only available on selected Intel processors)
- Choose a different processor with a sufficiently high TDP
QoS Support in Silicon and RTOS/Hypervisor
To run hard real-time applications on top of a hypervisor, ensure the following requirements are met by the hypervisor:
- Strict temporal isolation of guest operating systems
- Use of QoS features found in the silicon to eliminate interference on hardware level (e.g. Cache Allocation Technology)
- Use of real-time execution mode without adding latency and/or jitter while accessing hardware or processing interrupts
For optimal real-time performance (lowest latencies and jitter), congatec recommends to use the RTS Hypervisor